2013年8月7日星期三

FPGA logic design elements

Wireless digital spread spectrum communication platform, DSP clocked at 10.24MHz, using FPGA logic can get CL2 eighths frequency of 1.28MHz oscillator frequency, then the counter counts pulses respectively CL2 CL1 and FRM signal can be obtained, counts were 80 and 19200. Since there is no micro-LCD module RAM (display buffer), so in the FPGA construct two 32 words of RAM, a DSP board from a RAM (64K words) reads the display data, while the other is used to transfer data sent to the lcd module.

Reads the display data from the DSP board used when the clock frequency is 10.24MHz, with the DSP DSP HOLD mode lets give up control of the bus. Data to the LCD screen displays the frequency of 1.28MHz. So, FPGA 32-character display data to the LCD display requires 100us, so HOLD interrupt frequency as 100us. Thus, you can analyze the FPGA LCD DSP control will occupy about 5% of working time. Considering no additional hardware resources can be achieved LCD control, such an arrangement is more reasonable. Through the FPGA logic design, FPGA can also issue a read signal RD, chip select signal DS and address bus A0-A15, but these signals are only valid during the HOLDA issue, other times to a high impedance state, thus will not affect the DSP FPGA work.
LCD touch screen control

By design, combined with resistive touch screen controller ADS7843 dedicated application constitutes a set of text graphics pen control, editing and wireless transmission in one of the wireless handheld computer products. BURR-BROWN ADS7843 is a company dedicated to the 4-wire resistive touch screen, 12-bit analog / digital sampling converters, a single power supply, full power-down mode, the conversion speed is fast. ADS7843 used in a large battery PDA (personal digital assistants) and handheld portable devices. Through the DSP for synchronous serial port on the ADS7843 touchscreen interface control can get the position switching signal, and then the DSP computing into data to be displayed into an external display buffer, FPGA as an lcd graphic display modules controller will be able to send data in the display buffer LCD screen to display correctly. Meanwhile, from the touch screen pattern obtained by the DSP editing and processing of the various information is also transmitted via the wireless spread spectrum communication platform out. Of course, to accomplish these functions must also increase editing software and Store.

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